NoCWalk: In-Network Page Walks for Concurrent Data Structure Workloads on Multicore

Concurrent data-structure workloads on multicores stress the virtual-address translation path, where page-table walks add latency on the critical path. NoCWalk moves page-table walks into the on-chip network (NoC), performing translation closer to where the data resides and overlapping it with on-chip communication.

The result is reduced address-translation latency for pointer-heavy, concurrent workloads, treating the interconnect as an active participant in the memory-system path rather than a passive transport.

Recommended citation: Yuan Yao, S. Li, R. Aligholipour and S. Kaxiras, "NoCWalk: In-Network Page Walks for Concurrent Data Structure Workloads on Multicore," 2026 ACM International Conference on Computing Frontiers (CF), Catania, Italy, 2026.